Ph.D. in Computer Engineering (UMBC · Dec 2025)
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University of Maryland Baltimore County, USA
CGPA 3.97 / 4.00
Biography
Researcher · Hardware Engineer · Educator
I work at the intersection of cognitive radio / spectrum ML, FPGA and ASIC bring-up, and neuromorphic edge intelligence—grounded in peer-reviewed publication, industry internships, and years of teaching labs.
“Ship with evidence, learn in public, and leave the codebase kinder than you found it.”
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University of Maryland Baltimore County, USA
CGPA 3.97 / 4.00
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University of Maryland Baltimore County, USA
CGPA 3.97 / 4.00
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Kyung Hee University, South Korea
CGPA 4.10 / 4.30
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Islamic University of Technology, Dhaka, Bangladesh
CGPA 3.98 / 4.00
Jan 2021 – Dec 2025 · Baltimore, MD · On-site / Remote
During the Ph.D. (completed Dec 2025), multiple GTA/GRA appointments—computer architecture (CMPE/CMSC 611), digital image processing (ENEE/CMSC 691), circuits & ML labs (CMPE 306/678), PLD & electronics (CMPE 415/314). GRAs: Xilinx DPR & FinFET layout, HLS spike neural nets, bio-inspired architectures, PyTorch modulation for multipath/edge, LTE whitespace detection, and related reporting.
University of Maryland Baltimore County, USA
May 2024 – Aug 2024 · 4 months
AR/VR rapid FPGA prototyping for laser/LCoS micro-display controllers; RTL & HLS IPs, micro-arch and verification reviews, SWaP-C analysis, and verification infrastructure—true-color RGB on micro-display.
Redmond, Washington, USA · On-site
Aug 2023 – Mar 2024 · 8 months
FPGA-based prototype of the WearME device for COPD patients—RTL + C/C++ on Altera SoC DE10-nano; ADC/DAC interfaces; EMI/ESI reduction; PLL design; deep learning algorithms; PCB design; FDA-compliant documentation. Xilinx Vivado, Altera Quartus.
Hybrid
May 2022 – May 2023 · 1 year 1 month
Next-generation Xeon SoC: high-speed clock distribution with optimized skew, jitter, and latency. Static timing analysis, ANOVA simulation, power analysis, and global variation analysis—Synopsys Fusion Compiler, ICC II, Cadence Virtuoso; Python, MATLAB, Excel.
Hudson, Massachusetts, USA · Remote
Aug 2016 – Jan 2021 · Gazipur · On-site
Assistant Professor: numerical methods theory & lab. Lecturer: semiconductor devices, advanced electronics, VLSI, digital electronics, microprocessors, signals & systems, AC circuits—labs with Python, MATLAB, CAD, LabVIEW, Simulink.
Gazipur District, Bangladesh
Feb 2013 – Aug 2015 · Full-time
TID effects on SRAM cache (28nm FD SOI tape-out); radiation-hardened combinational logic & flip-flops; robust FF against SEU (130nm tape-out)—literature, simulation (Eldo), layout, and chip verification under radiation.
Yongin, Gyeonggi, South Korea
Nov 2012 – Jan 2013 · 3 months
Conducted Digital System Design laboratory sessions.
Dhaka, Bangladesh
Sep 2009 – Jun 2010 · 10 months
Data analysis workflows using Python.
Dhaka, Bangladesh · Hybrid
Government of South Korea · Jan 2014
Kyung Hee University · CSA & VLSI Lab
Excellent performance in Master's research work.
2014Organisation of Islamic Cooperation · Dec 2008
Islamic University of Technology
Excellent performance at Islamic University of Technology's entrance exam for the undergraduate program.
2008Bangladesh Education Board · Dec 2008
Rajshahi Cadet College
For excellent result in H.S.C.
2008Bangladesh Education Board · Sep 2006
Rajshahi Cadet College
For excellent result in S.S.C.
2006Upload a PDF on the CV section row, or keep a file at documents/cv.pdf under static files as fallback.